Strain-Compensated InGaAsP Superlattices for Defect Reduction of InP Grown on Exact-Oriented (001) Patterned Si Substrates by Metal Organic Chemical Vapor Deposition

L. Megalini, S. T. Š. Brunelli, W. O. Charles, A. Taylor, B. Isaac, J. E. Bowers, and J. Klamkin
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cross-section SEM image of the Si wafer patterning
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11, 337

We report on the use of InGaAsP strain-compensated superlattices (SC-SLs) as a technique to reduce the defect density of Indium Phosphide (InP) grown on silicon (InP-on-Si) by Metal Organic Chemical Vapor Deposition (MOCVD). Initially, a 2 µm thick gallium arsenide (GaAs) layer was grown with very high uniformity on exact oriented (001) 300 mm Si wafers; which had been patterned in 90 nm V-grooved trenches separated by silicon dioxide (SiO2) stripes and oriented along the [110] direction. Undercut at the Si/SiO2 interface was used to reduce the propagation of defects into the III–V layers. Following wafer dicing; 2.6 µm of indium phosphide (InP) was grown on such GaAs-on-Si templates. InGaAsP SC-SLs and thermal annealing were used to achieve a high-quality and smooth InP pseudo-substrate with a reduced defect density. Both the GaAs-on-Si and the subsequently grown InP layers were characterized using a variety of techniques including X-ray diffraction (XRD); atomic force microscopy (AFM); transmission electron microscopy (TEM); and electron channeling contrast imaging (ECCI); which indicate high-quality of the epitaxial films. The threading dislocation density and RMS surface roughness of the final InP layer were 5 × 108/cm2 and 1.2 nm; respectively and 7.8 × 107/cm2 and 10.8 nm for the GaAs-on-Si layer.

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Research Areas
Silicon Photonics